Current phase-locked loop (PLL) circuits may include features for comparing the phase of an output signal from a voltage-controlled oscillator (VCO) with the phase of an input reference frequency to the PLL. Such circuits may include a phase frequency detector for producing an error signal that signifies the proportion of any phase difference between the output signal and the input reference frequency. In addition, current PLL circuits may also include features for feeding the error signal into a low-pass filter and then into the VCO such that the output signal that is produced is synchronized with the input reference frequency to the PLL. Current PLL circuits may employ the negative feedback loop method of feeding the output from the VCO back into the input of the phase frequency detector such that an error signal may be generated, coupling the output signal from the VCO to the input reference frequency. In some current PLL circuits, the output signal may be fed into a frequency divider circuit to produce an integer multiple of the input reference frequency.
However, current PLL circuits do not include a loop filter in series with a phase detector and charge-pump, where the loop filter receives a signal from the phase detector and charge-pump, filters the signal, and feeds the output signal from the loop filter into a VCO. In particular, current PLL circuits do not include a loop filter that includes a standard integrator, pole zero, and RLC post-filter. A buffer may be inserted at the output of the integrator to isolate the integrator from the impedance of the RLC post-filter. In addition, the buffer may extend the tuning voltage range, which is limited by the linear response of the charge pump, and apply it to the VCO by selecting between an N-type and P-type source follower, where the P-type source follower may level shift the charge pump output up by approximately +0.5 volts (V) and the N-type source follower may level shift the charge pump output down by approximately −0.5 volts (V).